Modern digital electronic circuits and systems transmit or convey sequences of binary values, commonly referred to as bit sequences or digital signals. These bit sequences are conveyed as voltage waveforms, wherein the voltage amplitude for a given time period or bit, corresponds to a binary logic value at that same time period. Accordingly, a digital signal appears as a voltage waveform in the signal lines and transmission channels of electronic systems. As a digital signal is transmitted through a circuit, various effects may cause the signal to degrade, often to the point that errors occur. Errors within a digital signal may be quantified by a bit error rate. In many instances, the bit error rate of a circuit or signal pathway is defined as the ratio of incorrectly received bits to the total number of bits transmitted. An important consideration in digital electronic design is fidelity, or the quality with which a signal is conveyed. The fidelity of an electronic system is often referred to as signal integrity. As designers have increased the speed of operation and manufacturing has scaled the physical dimensions of today's modern circuits, signal integrity has become increasingly more important. Currently, virtually all electronic circuits are designed with signal integrity in mind.
Digital electronic designers often employ techniques to assist in optimizing the performance and signal integrity of their designs. Various techniques that simulate or predict the signal integrity of pathways used to transmit signals within a circuit are often employed. Typically, these techniques are used prior to the circuit ever being manufactured, by for example simulating the signal integrity. By adding simulation techniques to the design phase of a devices development, signal integrity problems can often be identified before the device is ever manufactured. For example, simulation tools can assist the designer in accounting for issues that commonly cause signal degradation, such as ringing, crosstalk, noise, ground bounce, or intersymbol interference.
Integrated circuit (IC) design and printed circuit board (PCB) design are two areas where electronic design automation tools may be used to analyze, correct, or prevent signal integrity problems. In particular, the pathways that transmit signals between various components on a printed circuit board or within an integrated circuit, often referred to as channels, may be analyzed for signal integrity problems. For example, the signal integrity of a channel between a driver and a buffer of a printed circuit board (PCB) layout may be analyzed. Generally, it is analyzed so that the bit error rate of the channel may be accurately predicted and minimized prior to manufacturing.
As discussed above, a digital signal is comprised of a series or sequence of bits. As further stated above, it is desirable to maximize the integrity with which the channel transmits a digital signal. In order to assist in maximizing the signal integrity of a channel, the channel is often tested under its worst possible operating condition. This may be accomplished by generating a digital signal or bit sequence that produces the worst possible signal integrity values for the channel. More particularly, the bit sequence which experiences the greatest distortion or degradation as it is transmitted through the channel is desired. By testing the channel against the “worst case bit sequence”, designers can optimize the channels signal integrity.
Currently, methods, apparatuses, and systems exist for selecting a “worst case bit sequence” for an electronic circuit where the transmitter or driver and the channel are linear and time invariant. The concepts of linearity and time invariance are further discussed in greater detail below. Although a wide variety of electronic devices contain linear and time invariant components, many channels within modern electronic devices are driven or connected to a transmitter that is not linear. As indicated above, the signal integrity of channels within electronic systems are desirably tested. Accordingly, methods, apparatuses, and systems for generating a “worst case bit sequence” for a non-linear transmitter connected to a channel are desired.